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<title>Hardware Abstraction Layer (HAL)</title>
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<div class="header">
  <div class="summary">
<a href="#nested-classes">Data Structures</a> &#124;
<a href="#define-members">Macros</a> &#124;
<a href="#typedef-members">Typedefs</a> &#124;
<a href="#enum-members">Enumerations</a> &#124;
<a href="#var-members">Variables</a>  </div>
  <div class="headertitle"><div class="title">CYW20829 56-QFN<div class="ingroups"><a class="el" href="group__group__hal__impl.html">CAT1 Implementation Specific</a> &raquo; <a class="el" href="group__group__hal__impl__pin__package.html">Pins</a></div></div></div>
</div><!--header-->
<div class="contents">
<a name="details" id="details"></a><h2 class="groupheader">General Description</h2>
<p >Pin definitions and connections specific to the CYW20829 56-QFN package. </p>
<table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="nested-classes" name="nested-classes"></a>
Data Structures</h2></td></tr>
<tr class="memitem:structcyhal__resource__pin__mapping__t"><td class="memItemLeft" align="right" valign="top">struct &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a></td></tr>
<tr class="memdesc:structcyhal__resource__pin__mapping__t"><td class="mdescLeft">&#160;</td><td class="mdescRight">Represents an association between a pin and a resource.  <a href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">More...</a><br /></td></tr>
<tr class="separator:structcyhal__resource__pin__mapping__t"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="define-members" name="define-members"></a>
Macros</h2></td></tr>
<tr class="memitem:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="memItemLeft" align="right" valign="top"><a id="gadbcb21726bedc8b2e4f1bb2e0235035d" name="gadbcb21726bedc8b2e4f1bb2e0235035d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_GPIO</b>(port,  pin)&#160;&#160;&#160;((((uint8_t)(port)) &lt;&lt; 3U) + ((uint8_t)(pin)))</td></tr>
<tr class="memdesc:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Gets a pin definition from the provided port and pin numbers. <br /></td></tr>
<tr class="separator:gadbcb21726bedc8b2e4f1bb2e0235035d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="memItemLeft" align="right" valign="top"><a id="gae0af2ee8c5a2a2e6661962b368d1f2ba" name="gae0af2ee8c5a2a2e6661962b368d1f2ba"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_PIN</b>(pin)&#160;&#160;&#160;((uint8_t)(((uint8_t)pin) &amp; 0x07U))</td></tr>
<tr class="memdesc:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro that, given a gpio, will extract the pin number. <br /></td></tr>
<tr class="separator:gae0af2ee8c5a2a2e6661962b368d1f2ba"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga015f256578abd5638668ff19b9dc89d5"><td class="memItemLeft" align="right" valign="top"><a id="ga015f256578abd5638668ff19b9dc89d5" name="ga015f256578abd5638668ff19b9dc89d5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_GET_PORT</b>(pin)&#160;&#160;&#160;((uint8_t)(((uint8_t)pin) &gt;&gt; 3U))</td></tr>
<tr class="memdesc:ga015f256578abd5638668ff19b9dc89d5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Macro that, given a gpio, will extract the port number. <br /></td></tr>
<tr class="separator:ga015f256578abd5638668ff19b9dc89d5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ad838f93d35a979abbe1cb520474b8f"><td class="memItemLeft" align="right" valign="top"><a id="ga6ad838f93d35a979abbe1cb520474b8f" name="ga6ad838f93d35a979abbe1cb520474b8f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_ADCMIC_CLK_PDM</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga6ad838f93d35a979abbe1cb520474b8f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for adcmic_clk_pdm. <br /></td></tr>
<tr class="separator:ga6ad838f93d35a979abbe1cb520474b8f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8155ef1c803abe4ecb44f7fc504a31b6"><td class="memItemLeft" align="right" valign="top"><a id="ga8155ef1c803abe4ecb44f7fc504a31b6" name="ga8155ef1c803abe4ecb44f7fc504a31b6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_ADCMIC_GPIO_ADC_IN</b>&#160;&#160;&#160;(CY_GPIO_DM_ANALOG)</td></tr>
<tr class="memdesc:ga8155ef1c803abe4ecb44f7fc504a31b6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for adcmic_gpio_adc_in. <br /></td></tr>
<tr class="separator:ga8155ef1c803abe4ecb44f7fc504a31b6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9cafe677b73db4d6fcb892df4bf1f92a"><td class="memItemLeft" align="right" valign="top"><a id="ga9cafe677b73db4d6fcb892df4bf1f92a" name="ga9cafe677b73db4d6fcb892df4bf1f92a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_ADCMIC_PDM_DATA</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga9cafe677b73db4d6fcb892df4bf1f92a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for adcmic_pdm_data. <br /></td></tr>
<tr class="separator:ga9cafe677b73db4d6fcb892df4bf1f92a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga3cd43fc956862ad59f73e28719951c5b"><td class="memItemLeft" align="right" valign="top"><a id="ga3cd43fc956862ad59f73e28719951c5b" name="ga3cd43fc956862ad59f73e28719951c5b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CANFD_TTCAN_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga3cd43fc956862ad59f73e28719951c5b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for canfd_ttcan_rx. <br /></td></tr>
<tr class="separator:ga3cd43fc956862ad59f73e28719951c5b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa204ca86ffbc1b1425ff244251415b6d"><td class="memItemLeft" align="right" valign="top"><a id="gaa204ca86ffbc1b1425ff244251415b6d" name="gaa204ca86ffbc1b1425ff244251415b6d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CANFD_TTCAN_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaa204ca86ffbc1b1425ff244251415b6d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for canfd_ttcan_tx. <br /></td></tr>
<tr class="separator:gaa204ca86ffbc1b1425ff244251415b6d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga66081266dabf00083602bf72e5fe5313"><td class="memItemLeft" align="right" valign="top"><a id="ga66081266dabf00083602bf72e5fe5313" name="ga66081266dabf00083602bf72e5fe5313"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_CLK_SWJ_SWCLK_TCLK</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLDOWN)</td></tr>
<tr class="memdesc:ga66081266dabf00083602bf72e5fe5313"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_clk_swj_swclk_tclk. <br /></td></tr>
<tr class="separator:ga66081266dabf00083602bf72e5fe5313"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d693c529e942511b7225790218610f1"><td class="memItemLeft" align="right" valign="top"><a id="ga7d693c529e942511b7225790218610f1" name="ga7d693c529e942511b7225790218610f1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_RST_SWJ_TRSTN</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:ga7d693c529e942511b7225790218610f1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_rst_swj_trstn. <br /></td></tr>
<tr class="separator:ga7d693c529e942511b7225790218610f1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8ac645a03a58b04107a745d3a711de8d"><td class="memItemLeft" align="right" valign="top"><a id="ga8ac645a03a58b04107a745d3a711de8d" name="ga8ac645a03a58b04107a745d3a711de8d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWDIO_TMS</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:ga8ac645a03a58b04107a745d3a711de8d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swdio_tms. <br /></td></tr>
<tr class="separator:ga8ac645a03a58b04107a745d3a711de8d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="memItemLeft" align="right" valign="top"><a id="gad019c0b133fdf6f7dc5dae836cfe8f5c" name="gad019c0b133fdf6f7dc5dae836cfe8f5c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWDOE_TDI</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swdoe_tdi. <br /></td></tr>
<tr class="separator:gad019c0b133fdf6f7dc5dae836cfe8f5c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadd74ce587fa555c8650a802012fcbc95"><td class="memItemLeft" align="right" valign="top"><a id="gadd74ce587fa555c8650a802012fcbc95" name="gadd74ce587fa555c8650a802012fcbc95"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_SWJ_SWO_TDO</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gadd74ce587fa555c8650a802012fcbc95"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_swj_swo_tdo. <br /></td></tr>
<tr class="separator:gadd74ce587fa555c8650a802012fcbc95"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="memItemLeft" align="right" valign="top"><a id="ga05e76b82d7531ae0d9b403c8b9382db6" name="ga05e76b82d7531ae0d9b403c8b9382db6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_TRACE_CLOCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_trace_clock. <br /></td></tr>
<tr class="separator:ga05e76b82d7531ae0d9b403c8b9382db6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="memItemLeft" align="right" valign="top"><a id="ga6ba1c6630f89a2fed5771a88c5baf5d4" name="ga6ba1c6630f89a2fed5771a88c5baf5d4"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_CPUSS_TRACE_DATA</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for cpuss_trace_data. <br /></td></tr>
<tr class="separator:ga6ba1c6630f89a2fed5771a88c5baf5d4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac9aa3f9c5f3a5f38d95c1ecd8432d7d3"><td class="memItemLeft" align="right" valign="top"><a id="gac9aa3f9c5f3a5f38d95c1ecd8432d7d3" name="gac9aa3f9c5f3a5f38d95c1ecd8432d7d3"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_KEYSCAN_KS_COL</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:gac9aa3f9c5f3a5f38d95c1ecd8432d7d3"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for keyscan_ks_col. <br /></td></tr>
<tr class="separator:gac9aa3f9c5f3a5f38d95c1ecd8432d7d3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga11475ade64ef90647fd7161df47882c7"><td class="memItemLeft" align="right" valign="top"><a id="ga11475ade64ef90647fd7161df47882c7" name="ga11475ade64ef90647fd7161df47882c7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_KEYSCAN_KS_ROW</b>&#160;&#160;&#160;(CY_GPIO_DM_PULLUP)</td></tr>
<tr class="memdesc:ga11475ade64ef90647fd7161df47882c7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for keyscan_ks_row. <br /></td></tr>
<tr class="separator:ga11475ade64ef90647fd7161df47882c7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaff87317f650292aac66c1ce11bd64b07"><td class="memItemLeft" align="right" valign="top"><a id="gaff87317f650292aac66c1ce11bd64b07" name="gaff87317f650292aac66c1ce11bd64b07"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_EN</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gaff87317f650292aac66c1ce11bd64b07"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_en. <br /></td></tr>
<tr class="separator:gaff87317f650292aac66c1ce11bd64b07"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga103ec4f23580d558657ed6b57cde5789"><td class="memItemLeft" align="right" valign="top"><a id="ga103ec4f23580d558657ed6b57cde5789" name="ga103ec4f23580d558657ed6b57cde5789"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga103ec4f23580d558657ed6b57cde5789"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_rx. <br /></td></tr>
<tr class="separator:ga103ec4f23580d558657ed6b57cde5789"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="memItemLeft" align="right" valign="top"><a id="gaf8f95e20bf8c7e699bccaab260a615cd" name="gaf8f95e20bf8c7e699bccaab260a615cd"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_LIN_LIN_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for lin_lin_tx. <br /></td></tr>
<tr class="separator:gaf8f95e20bf8c7e699bccaab260a615cd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga760364f9dd3c789544b9b96f4aa6b846"><td class="memItemLeft" align="right" valign="top"><a id="ga760364f9dd3c789544b9b96f4aa6b846" name="ga760364f9dd3c789544b9b96f4aa6b846"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PDM_PDM_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga760364f9dd3c789544b9b96f4aa6b846"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for pdm_pdm_clk. <br /></td></tr>
<tr class="separator:ga760364f9dd3c789544b9b96f4aa6b846"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga99ff05bfe0825a31f9d6bbca2b034a9a"><td class="memItemLeft" align="right" valign="top"><a id="ga99ff05bfe0825a31f9d6bbca2b034a9a" name="ga99ff05bfe0825a31f9d6bbca2b034a9a"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PDM_PDM_DATA</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga99ff05bfe0825a31f9d6bbca2b034a9a"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for pdm_pdm_data. <br /></td></tr>
<tr class="separator:ga99ff05bfe0825a31f9d6bbca2b034a9a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga02bf919af595cef48bee3cd806aa34d2"><td class="memItemLeft" align="right" valign="top"><a id="ga02bf919af595cef48bee3cd806aa34d2" name="ga02bf919af595cef48bee3cd806aa34d2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PERI_TR_IO_INPUT</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga02bf919af595cef48bee3cd806aa34d2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for peri_tr_io_input. <br /></td></tr>
<tr class="separator:ga02bf919af595cef48bee3cd806aa34d2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga398974f343b22b299471dc52c29a1c37"><td class="memItemLeft" align="right" valign="top"><a id="ga398974f343b22b299471dc52c29a1c37" name="ga398974f343b22b299471dc52c29a1c37"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_PERI_TR_IO_OUTPUT</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga398974f343b22b299471dc52c29a1c37"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for peri_tr_io_output. <br /></td></tr>
<tr class="separator:ga398974f343b22b299471dc52c29a1c37"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="memItemLeft" align="right" valign="top"><a id="gaa02073e8f6e8a250aeb851a5976eb92c" name="gaa02073e8f6e8a250aeb851a5976eb92c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_I2C_SCL</b>&#160;&#160;&#160;(CY_GPIO_DM_OD_DRIVESLOW)</td></tr>
<tr class="memdesc:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_i2c_scl. <br /></td></tr>
<tr class="separator:gaa02073e8f6e8a250aeb851a5976eb92c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf36de7401e064efcc2b803c835bbd94f"><td class="memItemLeft" align="right" valign="top"><a id="gaf36de7401e064efcc2b803c835bbd94f" name="gaf36de7401e064efcc2b803c835bbd94f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_I2C_SDA</b>&#160;&#160;&#160;(CY_GPIO_DM_OD_DRIVESLOW)</td></tr>
<tr class="memdesc:gaf36de7401e064efcc2b803c835bbd94f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_i2c_sda. <br /></td></tr>
<tr class="separator:gaf36de7401e064efcc2b803c835bbd94f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaa74b19db04790a5988f287e7b343f599"><td class="memItemLeft" align="right" valign="top"><a id="gaa74b19db04790a5988f287e7b343f599" name="gaa74b19db04790a5988f287e7b343f599"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaa74b19db04790a5988f287e7b343f599"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_clk. <br /></td></tr>
<tr class="separator:gaa74b19db04790a5988f287e7b343f599"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafd51be129e3d547477caa66ba0c6bf66"><td class="memItemLeft" align="right" valign="top"><a id="gafd51be129e3d547477caa66ba0c6bf66" name="gafd51be129e3d547477caa66ba0c6bf66"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_MISO</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gafd51be129e3d547477caa66ba0c6bf66"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_miso. <br /></td></tr>
<tr class="separator:gafd51be129e3d547477caa66ba0c6bf66"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga55ca1d04c27a976fa5941c416473b20b"><td class="memItemLeft" align="right" valign="top"><a id="ga55ca1d04c27a976fa5941c416473b20b" name="ga55ca1d04c27a976fa5941c416473b20b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_MOSI</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga55ca1d04c27a976fa5941c416473b20b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_mosi. <br /></td></tr>
<tr class="separator:ga55ca1d04c27a976fa5941c416473b20b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="memItemLeft" align="right" valign="top"><a id="ga86eeebaf595ecbf4d449c74122dd8b42" name="ga86eeebaf595ecbf4d449c74122dd8b42"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT0</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select0. <br /></td></tr>
<tr class="separator:ga86eeebaf595ecbf4d449c74122dd8b42"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga318ce843790a53d67e48f4a313f816c1"><td class="memItemLeft" align="right" valign="top"><a id="ga318ce843790a53d67e48f4a313f816c1" name="ga318ce843790a53d67e48f4a313f816c1"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT1</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga318ce843790a53d67e48f4a313f816c1"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select1. <br /></td></tr>
<tr class="separator:ga318ce843790a53d67e48f4a313f816c1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga803b92e83981ec41e43631ef1053d394"><td class="memItemLeft" align="right" valign="top"><a id="ga803b92e83981ec41e43631ef1053d394" name="ga803b92e83981ec41e43631ef1053d394"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT2</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga803b92e83981ec41e43631ef1053d394"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select2. <br /></td></tr>
<tr class="separator:ga803b92e83981ec41e43631ef1053d394"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="memItemLeft" align="right" valign="top"><a id="ga9f1267e1d5dcd2bb8ef2cc7fbf4af828" name="ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_M_SELECT3</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_m_select3. <br /></td></tr>
<tr class="separator:ga9f1267e1d5dcd2bb8ef2cc7fbf4af828"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4063871044d7a566b58b5b0955b56d55"><td class="memItemLeft" align="right" valign="top"><a id="ga4063871044d7a566b58b5b0955b56d55" name="ga4063871044d7a566b58b5b0955b56d55"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga4063871044d7a566b58b5b0955b56d55"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_clk. <br /></td></tr>
<tr class="separator:ga4063871044d7a566b58b5b0955b56d55"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="memItemLeft" align="right" valign="top"><a id="ga2b6f3b9a4229f16e16191644d7a021ec" name="ga2b6f3b9a4229f16e16191644d7a021ec"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_MISO</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_miso. <br /></td></tr>
<tr class="separator:ga2b6f3b9a4229f16e16191644d7a021ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="memItemLeft" align="right" valign="top"><a id="gac8e3a1c1ca5ed736ce59dbf11547e6ce" name="gac8e3a1c1ca5ed736ce59dbf11547e6ce"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_MOSI</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_mosi. <br /></td></tr>
<tr class="separator:gac8e3a1c1ca5ed736ce59dbf11547e6ce"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9574bec687f52f612c85880c0285787c"><td class="memItemLeft" align="right" valign="top"><a id="ga9574bec687f52f612c85880c0285787c" name="ga9574bec687f52f612c85880c0285787c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT0</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga9574bec687f52f612c85880c0285787c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select0. <br /></td></tr>
<tr class="separator:ga9574bec687f52f612c85880c0285787c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf2b36390a895539ae18d8e5a661642ef"><td class="memItemLeft" align="right" valign="top"><a id="gaf2b36390a895539ae18d8e5a661642ef" name="gaf2b36390a895539ae18d8e5a661642ef"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT1</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gaf2b36390a895539ae18d8e5a661642ef"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select1. <br /></td></tr>
<tr class="separator:gaf2b36390a895539ae18d8e5a661642ef"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae6f130fdc79bade0b25b31d39bab151c"><td class="memItemLeft" align="right" valign="top"><a id="gae6f130fdc79bade0b25b31d39bab151c" name="gae6f130fdc79bade0b25b31d39bab151c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT2</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gae6f130fdc79bade0b25b31d39bab151c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select2. <br /></td></tr>
<tr class="separator:gae6f130fdc79bade0b25b31d39bab151c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadf69720f4b9406d51715cf1b7b3a085b"><td class="memItemLeft" align="right" valign="top"><a id="gadf69720f4b9406d51715cf1b7b3a085b" name="gadf69720f4b9406d51715cf1b7b3a085b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_SPI_S_SELECT3</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:gadf69720f4b9406d51715cf1b7b3a085b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_spi_s_select3. <br /></td></tr>
<tr class="separator:gadf69720f4b9406d51715cf1b7b3a085b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="memItemLeft" align="right" valign="top"><a id="ga25dd33bcc5f3fba5b23fb4d5d056e476" name="ga25dd33bcc5f3fba5b23fb4d5d056e476"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_CTS</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_cts. <br /></td></tr>
<tr class="separator:ga25dd33bcc5f3fba5b23fb4d5d056e476"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="memItemLeft" align="right" valign="top"><a id="ga9bfa51d83fd3fd131ff45de5d68c5c9e" name="ga9bfa51d83fd3fd131ff45de5d68c5c9e"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_RTS</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_rts. <br /></td></tr>
<tr class="separator:ga9bfa51d83fd3fd131ff45de5d68c5c9e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="memItemLeft" align="right" valign="top"><a id="ga54e48d58c2a0ca7b205fa0868a41844c" name="ga54e48d58c2a0ca7b205fa0868a41844c"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_RX</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_rx. <br /></td></tr>
<tr class="separator:ga54e48d58c2a0ca7b205fa0868a41844c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga90d6cd790e46fac220149ced8a6cf67d"><td class="memItemLeft" align="right" valign="top"><a id="ga90d6cd790e46fac220149ced8a6cf67d" name="ga90d6cd790e46fac220149ced8a6cf67d"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SCB_UART_TX</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga90d6cd790e46fac220149ced8a6cf67d"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for scb_uart_tx. <br /></td></tr>
<tr class="separator:ga90d6cd790e46fac220149ced8a6cf67d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9202ce29e6db8581737a32d12c36f206"><td class="memItemLeft" align="right" valign="top"><a id="ga9202ce29e6db8581737a32d12c36f206" name="ga9202ce29e6db8581737a32d12c36f206"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_CLK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG)</td></tr>
<tr class="memdesc:ga9202ce29e6db8581737a32d12c36f206"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_clk. <br /></td></tr>
<tr class="separator:ga9202ce29e6db8581737a32d12c36f206"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac318010274b12c158f3d1e86f99cd72b"><td class="memItemLeft" align="right" valign="top"><a id="gac318010274b12c158f3d1e86f99cd72b" name="gac318010274b12c158f3d1e86f99cd72b"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_DATA0</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG)</td></tr>
<tr class="memdesc:gac318010274b12c158f3d1e86f99cd72b"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_data0. <br /></td></tr>
<tr class="separator:gac318010274b12c158f3d1e86f99cd72b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5cf5fc11e30437613cbb58fc3d08cd5f"><td class="memItemLeft" align="right" valign="top"><a id="ga5cf5fc11e30437613cbb58fc3d08cd5f" name="ga5cf5fc11e30437613cbb58fc3d08cd5f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_DATA1</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG)</td></tr>
<tr class="memdesc:ga5cf5fc11e30437613cbb58fc3d08cd5f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_data1. <br /></td></tr>
<tr class="separator:ga5cf5fc11e30437613cbb58fc3d08cd5f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2dc77ed5cbb7c57306a64b17961211ed"><td class="memItemLeft" align="right" valign="top"><a id="ga2dc77ed5cbb7c57306a64b17961211ed" name="ga2dc77ed5cbb7c57306a64b17961211ed"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_DATA2</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG)</td></tr>
<tr class="memdesc:ga2dc77ed5cbb7c57306a64b17961211ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_data2. <br /></td></tr>
<tr class="separator:ga2dc77ed5cbb7c57306a64b17961211ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5670d4ade46ffab0f19bb53f0bdfb2e8"><td class="memItemLeft" align="right" valign="top"><a id="ga5670d4ade46ffab0f19bb53f0bdfb2e8" name="ga5670d4ade46ffab0f19bb53f0bdfb2e8"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_DATA3</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG)</td></tr>
<tr class="memdesc:ga5670d4ade46ffab0f19bb53f0bdfb2e8"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_data3. <br /></td></tr>
<tr class="separator:ga5670d4ade46ffab0f19bb53f0bdfb2e8"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaec35ac47f1a4b24812dfe060f92ec3f2"><td class="memItemLeft" align="right" valign="top"><a id="gaec35ac47f1a4b24812dfe060f92ec3f2" name="gaec35ac47f1a4b24812dfe060f92ec3f2"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_SELECT0</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gaec35ac47f1a4b24812dfe060f92ec3f2"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_select0. <br /></td></tr>
<tr class="separator:gaec35ac47f1a4b24812dfe060f92ec3f2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1753c732069a1059a0c36b6f7010be99"><td class="memItemLeft" align="right" valign="top"><a id="ga1753c732069a1059a0c36b6f7010be99" name="ga1753c732069a1059a0c36b6f7010be99"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_SMIF_SPI_SELECT1</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga1753c732069a1059a0c36b6f7010be99"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for smif_spi_select1. <br /></td></tr>
<tr class="separator:ga1753c732069a1059a0c36b6f7010be99"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae412e083c2cc451e231e97921df65207"><td class="memItemLeft" align="right" valign="top"><a id="gae412e083c2cc451e231e97921df65207" name="gae412e083c2cc451e231e97921df65207"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TCPWM_LINE</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gae412e083c2cc451e231e97921df65207"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tcpwm_line. <br /></td></tr>
<tr class="separator:gae412e083c2cc451e231e97921df65207"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga26f39d579dedec1f490b827cda147add"><td class="memItemLeft" align="right" valign="top"><a id="ga26f39d579dedec1f490b827cda147add" name="ga26f39d579dedec1f490b827cda147add"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TCPWM_LINE_COMPL</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga26f39d579dedec1f490b827cda147add"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tcpwm_line_compl. <br /></td></tr>
<tr class="separator:ga26f39d579dedec1f490b827cda147add"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae9ea7d9863b30ebe2ac5c805c69c8317"><td class="memItemLeft" align="right" valign="top"><a id="gae9ea7d9863b30ebe2ac5c805c69c8317" name="gae9ea7d9863b30ebe2ac5c805c69c8317"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_RX_FSYNC</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gae9ea7d9863b30ebe2ac5c805c69c8317"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_rx_fsync. <br /></td></tr>
<tr class="separator:gae9ea7d9863b30ebe2ac5c805c69c8317"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9e8d9a230dfbc67596cb1682de1284f5"><td class="memItemLeft" align="right" valign="top"><a id="ga9e8d9a230dfbc67596cb1682de1284f5" name="ga9e8d9a230dfbc67596cb1682de1284f5"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_RX_MCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9e8d9a230dfbc67596cb1682de1284f5"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_rx_mck. <br /></td></tr>
<tr class="separator:ga9e8d9a230dfbc67596cb1682de1284f5"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d58ef3c03846bfcc176e1851dc764eb"><td class="memItemLeft" align="right" valign="top"><a id="ga9d58ef3c03846bfcc176e1851dc764eb" name="ga9d58ef3c03846bfcc176e1851dc764eb"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_RX_SCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga9d58ef3c03846bfcc176e1851dc764eb"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_rx_sck. <br /></td></tr>
<tr class="separator:ga9d58ef3c03846bfcc176e1851dc764eb"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga27368560a9361f5a9b6493d2702d5a9f"><td class="memItemLeft" align="right" valign="top"><a id="ga27368560a9361f5a9b6493d2702d5a9f" name="ga27368560a9361f5a9b6493d2702d5a9f"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_RX_SD</b>&#160;&#160;&#160;(CY_GPIO_DM_HIGHZ)</td></tr>
<tr class="memdesc:ga27368560a9361f5a9b6493d2702d5a9f"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_rx_sd. <br /></td></tr>
<tr class="separator:ga27368560a9361f5a9b6493d2702d5a9f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5fa787d9c2c4e95e88b80cd2464da4e6"><td class="memItemLeft" align="right" valign="top"><a id="ga5fa787d9c2c4e95e88b80cd2464da4e6" name="ga5fa787d9c2c4e95e88b80cd2464da4e6"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_TX_FSYNC</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga5fa787d9c2c4e95e88b80cd2464da4e6"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_tx_fsync. <br /></td></tr>
<tr class="separator:ga5fa787d9c2c4e95e88b80cd2464da4e6"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7688a77812be8c6ebc14f17513988bb7"><td class="memItemLeft" align="right" valign="top"><a id="ga7688a77812be8c6ebc14f17513988bb7" name="ga7688a77812be8c6ebc14f17513988bb7"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_TX_MCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga7688a77812be8c6ebc14f17513988bb7"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_tx_mck. <br /></td></tr>
<tr class="separator:ga7688a77812be8c6ebc14f17513988bb7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae11a50b0de22379733e6827e8c211347"><td class="memItemLeft" align="right" valign="top"><a id="gae11a50b0de22379733e6827e8c211347" name="gae11a50b0de22379733e6827e8c211347"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_TX_SCK</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:gae11a50b0de22379733e6827e8c211347"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_tx_sck. <br /></td></tr>
<tr class="separator:gae11a50b0de22379733e6827e8c211347"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6c5148607574e4f3da68b777ef4331d0"><td class="memItemLeft" align="right" valign="top"><a id="ga6c5148607574e4f3da68b777ef4331d0" name="ga6c5148607574e4f3da68b777ef4331d0"></a>
#define&#160;</td><td class="memItemRight" valign="bottom"><b>CYHAL_PIN_MAP_DRIVE_MODE_TDM_TDM_TX_SD</b>&#160;&#160;&#160;(CY_GPIO_DM_STRONG_IN_OFF)</td></tr>
<tr class="memdesc:ga6c5148607574e4f3da68b777ef4331d0"><td class="mdescLeft">&#160;</td><td class="mdescRight">Indicates that a pin map exists for tdm_tdm_tx_sd. <br /></td></tr>
<tr class="separator:ga6c5148607574e4f3da68b777ef4331d0"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="typedef-members" name="typedef-members"></a>
Typedefs</h2></td></tr>
<tr class="memitem:ga7c87bd935bd6e52ed59c689579a709db"><td class="memItemLeft" align="right" valign="top"><a id="ga7c87bd935bd6e52ed59c689579a709db" name="ga7c87bd935bd6e52ed59c689579a709db"></a>
typedef <a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#gab24d2d0f36afa1c85516af9e53405e70">cyhal_gpio_cyw20829_56_qfn_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_gpio_t</b></td></tr>
<tr class="memdesc:ga7c87bd935bd6e52ed59c689579a709db"><td class="mdescLeft">&#160;</td><td class="mdescRight">Create generic name for the series/package specific type. <br /></td></tr>
<tr class="separator:ga7c87bd935bd6e52ed59c689579a709db"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="enum-members" name="enum-members"></a>
Enumerations</h2></td></tr>
<tr class="memitem:gab24d2d0f36afa1c85516af9e53405e70"><td class="memItemLeft" align="right" valign="top">enum &#160;</td><td class="memItemRight" valign="bottom"><a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#gab24d2d0f36afa1c85516af9e53405e70">cyhal_gpio_cyw20829_56_qfn_t</a> { <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a3dbd1016ea99d087d747530418b89a01">NC</a> = 0xFF
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a23d505c049c81443b12e53d5b00b1be9">P0_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a8c239764fe5c947cad341b176d49eb73">P0_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a950df72443b521531bc3be8f4058fd85">P0_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a7dd012609401076ec68c99a41fcf12bc">P0_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a8f9331cecf3c8f1bf81bc66386c8b4c1">P0_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70aad04d2399d62b5af8c88438d56ddf99b">P0_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_0, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70aa25f499b57adc3dae9ca1a877f47f2af">P1_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70ab0d32687fab06c4263f65b6741adf308">P1_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a12c69ba58f68ac9252a9e84170e354c7">P1_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70ac964ac363209c16f9e842d139f1821df">P1_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a2712fb6be5ef97fd9f5a9b42baaf5f05">P1_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70adb0a4a23b91349a0f85a26ee16c2299c">P1_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a1c09e634fa0f157f766022d25ea2860d">P1_6</a> = CYHAL_GET_GPIO(CYHAL_PORT_1, 6)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70aeeaaeb6232b5bd27b3d18c1699737e31">P2_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a33daef487e90b1d8ee897624249d060e">P2_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a10b4a9ccdcdec6c07ceedf09708bed1a">P2_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70ae1949ab941c558f0c66b48e8463bbada">P2_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70aa1814d6db2865c42fb3c7fc7688ab5c5">P2_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a40df3c1aee5d74c3877d7b8d8bccb69e">P2_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_2, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a2a52d7696dc09e50106e86c3c5d17553">P3_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70aecc7f0ac8642bc54d5263aa885d41908">P3_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70acd157ea5f39d394d92881bdfc3289dab">P3_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 2)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a54a63837a8bb026bd112b886ca8dc47d">P3_3</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 3)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a2870e8226d9447a9d9cc1788ae88dbb7">P3_4</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 4)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a2269bac40e13cb61f09fdb588507da82">P3_5</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 5)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70afd215d1efb45e70398433193f49c307c">P3_6</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 6)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a526941c3135107781ce25d01b016b23e">P3_7</a> = CYHAL_GET_GPIO(CYHAL_PORT_3, 7)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70ab85e0c3af8cd4b57398754081786a201">P4_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_4, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70abd2abcc9f0b2483ad5a64032a1edf2f4">P4_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_4, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a702f0443ac82eec7db778039597602de">P5_0</a> = CYHAL_GET_GPIO(CYHAL_PORT_5, 0)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a6e81efad69a0ea034651af008bd857b9">P5_1</a> = CYHAL_GET_GPIO(CYHAL_PORT_5, 1)
, <br />
&#160;&#160;<a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#ggab24d2d0f36afa1c85516af9e53405e70a48fead26a455d15e627a59f49e735ed6">P5_2</a> = CYHAL_GET_GPIO(CYHAL_PORT_5, 2)
<br />
 }</td></tr>
<tr class="memdesc:gab24d2d0f36afa1c85516af9e53405e70"><td class="mdescLeft">&#160;</td><td class="mdescRight">Definitions for all of the pins that are bonded out on in the 56-QFN package for the CYW20829 series.  <a href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#gab24d2d0f36afa1c85516af9e53405e70">More...</a><br /></td></tr>
<tr class="separator:gab24d2d0f36afa1c85516af9e53405e70"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table><table class="memberdecls">
<tr class="heading"><td colspan="2"><h2 class="groupheader"><a id="var-members" name="var-members"></a>
Variables</h2></td></tr>
<tr class="memitem:gadfe473a3caa83ee9dbbaacfede47981a"><td class="memItemLeft" align="right" valign="top"><a id="gadfe473a3caa83ee9dbbaacfede47981a" name="gadfe473a3caa83ee9dbbaacfede47981a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_adcmic_clk_pdm</b> [2]</td></tr>
<tr class="memdesc:gadfe473a3caa83ee9dbbaacfede47981a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the adcmic_clk_pdm signal. <br /></td></tr>
<tr class="separator:gadfe473a3caa83ee9dbbaacfede47981a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1328a3f7a8e70ba8beb92273c0e88c72"><td class="memItemLeft" align="right" valign="top"><a id="ga1328a3f7a8e70ba8beb92273c0e88c72" name="ga1328a3f7a8e70ba8beb92273c0e88c72"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_adcmic_gpio_adc_in</b> [8]</td></tr>
<tr class="memdesc:ga1328a3f7a8e70ba8beb92273c0e88c72"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the adcmic_gpio_adc_in signal. <br /></td></tr>
<tr class="separator:ga1328a3f7a8e70ba8beb92273c0e88c72"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7c8eaeb3d72701ba307fef4d349486a9"><td class="memItemLeft" align="right" valign="top"><a id="ga7c8eaeb3d72701ba307fef4d349486a9" name="ga7c8eaeb3d72701ba307fef4d349486a9"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_adcmic_pdm_data</b> [2]</td></tr>
<tr class="memdesc:ga7c8eaeb3d72701ba307fef4d349486a9"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the adcmic_pdm_data signal. <br /></td></tr>
<tr class="separator:ga7c8eaeb3d72701ba307fef4d349486a9"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga32e04b39f3a7240dbe2e5daedf31c642"><td class="memItemLeft" align="right" valign="top"><a id="ga32e04b39f3a7240dbe2e5daedf31c642" name="ga32e04b39f3a7240dbe2e5daedf31c642"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_canfd_ttcan_rx</b> [2]</td></tr>
<tr class="memdesc:ga32e04b39f3a7240dbe2e5daedf31c642"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the canfd_ttcan_rx signal. <br /></td></tr>
<tr class="separator:ga32e04b39f3a7240dbe2e5daedf31c642"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga29ec9e3fc543f973a37afb243dee94c2"><td class="memItemLeft" align="right" valign="top"><a id="ga29ec9e3fc543f973a37afb243dee94c2" name="ga29ec9e3fc543f973a37afb243dee94c2"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_canfd_ttcan_tx</b> [2]</td></tr>
<tr class="memdesc:ga29ec9e3fc543f973a37afb243dee94c2"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the canfd_ttcan_tx signal. <br /></td></tr>
<tr class="separator:ga29ec9e3fc543f973a37afb243dee94c2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae88967febaa763b37207945dcd955232"><td class="memItemLeft" align="right" valign="top"><a id="gae88967febaa763b37207945dcd955232" name="gae88967febaa763b37207945dcd955232"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_clk_swj_swclk_tclk</b> [1]</td></tr>
<tr class="memdesc:gae88967febaa763b37207945dcd955232"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_clk_swj_swclk_tclk signal. <br /></td></tr>
<tr class="separator:gae88967febaa763b37207945dcd955232"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga60df6947e1bb186f4a320f7362ea2566"><td class="memItemLeft" align="right" valign="top"><a id="ga60df6947e1bb186f4a320f7362ea2566" name="ga60df6947e1bb186f4a320f7362ea2566"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_rst_swj_trstn</b> [1]</td></tr>
<tr class="memdesc:ga60df6947e1bb186f4a320f7362ea2566"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_rst_swj_trstn signal. <br /></td></tr>
<tr class="separator:ga60df6947e1bb186f4a320f7362ea2566"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="memItemLeft" align="right" valign="top"><a id="ga1cdc8144f5c39110f8a87e4c1acd4176" name="ga1cdc8144f5c39110f8a87e4c1acd4176"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swdio_tms</b> [1]</td></tr>
<tr class="memdesc:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swdio_tms signal. <br /></td></tr>
<tr class="separator:ga1cdc8144f5c39110f8a87e4c1acd4176"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="memItemLeft" align="right" valign="top"><a id="gad2ba0f9b5a238e3d06237036845ae5ed" name="gad2ba0f9b5a238e3d06237036845ae5ed"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swdoe_tdi</b> [1]</td></tr>
<tr class="memdesc:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swdoe_tdi signal. <br /></td></tr>
<tr class="separator:gad2ba0f9b5a238e3d06237036845ae5ed"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="memItemLeft" align="right" valign="top"><a id="gaab3e5ef4da736a410b62a3b278ba67e4" name="gaab3e5ef4da736a410b62a3b278ba67e4"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_swj_swo_tdo</b> [1]</td></tr>
<tr class="memdesc:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_swj_swo_tdo signal. <br /></td></tr>
<tr class="separator:gaab3e5ef4da736a410b62a3b278ba67e4"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga76154fc4223b328cc790744b213a8c7b"><td class="memItemLeft" align="right" valign="top"><a id="ga76154fc4223b328cc790744b213a8c7b" name="ga76154fc4223b328cc790744b213a8c7b"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_trace_clock</b> [2]</td></tr>
<tr class="memdesc:ga76154fc4223b328cc790744b213a8c7b"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_trace_clock signal. <br /></td></tr>
<tr class="separator:ga76154fc4223b328cc790744b213a8c7b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0030a679fd05a02add8e255314d41c27"><td class="memItemLeft" align="right" valign="top"><a id="ga0030a679fd05a02add8e255314d41c27" name="ga0030a679fd05a02add8e255314d41c27"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_cpuss_trace_data</b> [8]</td></tr>
<tr class="memdesc:ga0030a679fd05a02add8e255314d41c27"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the cpuss_trace_data signal. <br /></td></tr>
<tr class="separator:ga0030a679fd05a02add8e255314d41c27"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1dfba65dad34ee5f6c88ef4fbfb01384"><td class="memItemLeft" align="right" valign="top"><a id="ga1dfba65dad34ee5f6c88ef4fbfb01384" name="ga1dfba65dad34ee5f6c88ef4fbfb01384"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_keyscan_ks_col</b> [20]</td></tr>
<tr class="memdesc:ga1dfba65dad34ee5f6c88ef4fbfb01384"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the keyscan_ks_col signal. <br /></td></tr>
<tr class="separator:ga1dfba65dad34ee5f6c88ef4fbfb01384"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab7629a80ace0fb0bb5711b15075b6e50"><td class="memItemLeft" align="right" valign="top"><a id="gab7629a80ace0fb0bb5711b15075b6e50" name="gab7629a80ace0fb0bb5711b15075b6e50"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_keyscan_ks_row</b> [8]</td></tr>
<tr class="memdesc:gab7629a80ace0fb0bb5711b15075b6e50"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the keyscan_ks_row signal. <br /></td></tr>
<tr class="separator:gab7629a80ace0fb0bb5711b15075b6e50"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gacde4c557a1f7d7cb2d2284ffefb0788d"><td class="memItemLeft" align="right" valign="top"><a id="gacde4c557a1f7d7cb2d2284ffefb0788d" name="gacde4c557a1f7d7cb2d2284ffefb0788d"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_en</b> [2]</td></tr>
<tr class="memdesc:gacde4c557a1f7d7cb2d2284ffefb0788d"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_en signal. <br /></td></tr>
<tr class="separator:gacde4c557a1f7d7cb2d2284ffefb0788d"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gadbc5ff4fa305416a318113a3c9ac70a3"><td class="memItemLeft" align="right" valign="top"><a id="gadbc5ff4fa305416a318113a3c9ac70a3" name="gadbc5ff4fa305416a318113a3c9ac70a3"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_rx</b> [2]</td></tr>
<tr class="memdesc:gadbc5ff4fa305416a318113a3c9ac70a3"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_rx signal. <br /></td></tr>
<tr class="separator:gadbc5ff4fa305416a318113a3c9ac70a3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae3e3e45ce0a6dc518d70edc15ab3b1a7"><td class="memItemLeft" align="right" valign="top"><a id="gae3e3e45ce0a6dc518d70edc15ab3b1a7" name="gae3e3e45ce0a6dc518d70edc15ab3b1a7"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_lin_lin_tx</b> [2]</td></tr>
<tr class="memdesc:gae3e3e45ce0a6dc518d70edc15ab3b1a7"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the lin_lin_tx signal. <br /></td></tr>
<tr class="separator:gae3e3e45ce0a6dc518d70edc15ab3b1a7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf76011ec2c436225bcd5d9f96821c0f0"><td class="memItemLeft" align="right" valign="top"><a id="gaf76011ec2c436225bcd5d9f96821c0f0" name="gaf76011ec2c436225bcd5d9f96821c0f0"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_pdm_pdm_clk</b> [4]</td></tr>
<tr class="memdesc:gaf76011ec2c436225bcd5d9f96821c0f0"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the pdm_pdm_clk signal. <br /></td></tr>
<tr class="separator:gaf76011ec2c436225bcd5d9f96821c0f0"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5e71243eead0d046fc707a72d4102ad2"><td class="memItemLeft" align="right" valign="top"><a id="ga5e71243eead0d046fc707a72d4102ad2" name="ga5e71243eead0d046fc707a72d4102ad2"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_pdm_pdm_data</b> [4]</td></tr>
<tr class="memdesc:ga5e71243eead0d046fc707a72d4102ad2"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the pdm_pdm_data signal. <br /></td></tr>
<tr class="separator:ga5e71243eead0d046fc707a72d4102ad2"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="memItemLeft" align="right" valign="top"><a id="ga9d9b46ef78bfed5695ee34a96b3271ae" name="ga9d9b46ef78bfed5695ee34a96b3271ae"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_peri_tr_io_input</b> [8]</td></tr>
<tr class="memdesc:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the peri_tr_io_input signal. <br /></td></tr>
<tr class="separator:ga9d9b46ef78bfed5695ee34a96b3271ae"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga9dc935f110b7314ffaa927253a11457f"><td class="memItemLeft" align="right" valign="top"><a id="ga9dc935f110b7314ffaa927253a11457f" name="ga9dc935f110b7314ffaa927253a11457f"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_peri_tr_io_output</b> [2]</td></tr>
<tr class="memdesc:ga9dc935f110b7314ffaa927253a11457f"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the peri_tr_io_output signal. <br /></td></tr>
<tr class="separator:ga9dc935f110b7314ffaa927253a11457f"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga1ad64b9f97daca7260be4b82fc793452"><td class="memItemLeft" align="right" valign="top"><a id="ga1ad64b9f97daca7260be4b82fc793452" name="ga1ad64b9f97daca7260be4b82fc793452"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_i2c_scl</b> [5]</td></tr>
<tr class="memdesc:ga1ad64b9f97daca7260be4b82fc793452"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_i2c_scl signal. <br /></td></tr>
<tr class="separator:ga1ad64b9f97daca7260be4b82fc793452"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafba81aade4ec15fac521f59953086922"><td class="memItemLeft" align="right" valign="top"><a id="gafba81aade4ec15fac521f59953086922" name="gafba81aade4ec15fac521f59953086922"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_i2c_sda</b> [5]</td></tr>
<tr class="memdesc:gafba81aade4ec15fac521f59953086922"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_i2c_sda signal. <br /></td></tr>
<tr class="separator:gafba81aade4ec15fac521f59953086922"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0509fb925be2145b861a84f4c92b37ec"><td class="memItemLeft" align="right" valign="top"><a id="ga0509fb925be2145b861a84f4c92b37ec" name="ga0509fb925be2145b861a84f4c92b37ec"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_clk</b> [3]</td></tr>
<tr class="memdesc:ga0509fb925be2145b861a84f4c92b37ec"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_clk signal. <br /></td></tr>
<tr class="separator:ga0509fb925be2145b861a84f4c92b37ec"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4418d2e82e9f7fe7101bd5349ee02142"><td class="memItemLeft" align="right" valign="top"><a id="ga4418d2e82e9f7fe7101bd5349ee02142" name="ga4418d2e82e9f7fe7101bd5349ee02142"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_miso</b> [4]</td></tr>
<tr class="memdesc:ga4418d2e82e9f7fe7101bd5349ee02142"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_miso signal. <br /></td></tr>
<tr class="separator:ga4418d2e82e9f7fe7101bd5349ee02142"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaceae70670db8692e950da34c59456efa"><td class="memItemLeft" align="right" valign="top"><a id="gaceae70670db8692e950da34c59456efa" name="gaceae70670db8692e950da34c59456efa"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_mosi</b> [4]</td></tr>
<tr class="memdesc:gaceae70670db8692e950da34c59456efa"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_mosi signal. <br /></td></tr>
<tr class="separator:gaceae70670db8692e950da34c59456efa"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gafe598c65957d42f295d97744e1f96827"><td class="memItemLeft" align="right" valign="top"><a id="gafe598c65957d42f295d97744e1f96827" name="gafe598c65957d42f295d97744e1f96827"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select0</b> [4]</td></tr>
<tr class="memdesc:gafe598c65957d42f295d97744e1f96827"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select0 signal. <br /></td></tr>
<tr class="separator:gafe598c65957d42f295d97744e1f96827"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga0329d1f754bcd832b06e7db8d6251fa3"><td class="memItemLeft" align="right" valign="top"><a id="ga0329d1f754bcd832b06e7db8d6251fa3" name="ga0329d1f754bcd832b06e7db8d6251fa3"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select1</b> [3]</td></tr>
<tr class="memdesc:ga0329d1f754bcd832b06e7db8d6251fa3"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select1 signal. <br /></td></tr>
<tr class="separator:ga0329d1f754bcd832b06e7db8d6251fa3"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga43ad57844d788999b172eb1984b0bb8e"><td class="memItemLeft" align="right" valign="top"><a id="ga43ad57844d788999b172eb1984b0bb8e" name="ga43ad57844d788999b172eb1984b0bb8e"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select2</b> [3]</td></tr>
<tr class="memdesc:ga43ad57844d788999b172eb1984b0bb8e"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select2 signal. <br /></td></tr>
<tr class="separator:ga43ad57844d788999b172eb1984b0bb8e"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8bf005d96677757fa3d5924f8003b2cf"><td class="memItemLeft" align="right" valign="top"><a id="ga8bf005d96677757fa3d5924f8003b2cf" name="ga8bf005d96677757fa3d5924f8003b2cf"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_m_select3</b> [2]</td></tr>
<tr class="memdesc:ga8bf005d96677757fa3d5924f8003b2cf"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_m_select3 signal. <br /></td></tr>
<tr class="separator:ga8bf005d96677757fa3d5924f8003b2cf"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga5f7c0aebb18e756b14693298944c380a"><td class="memItemLeft" align="right" valign="top"><a id="ga5f7c0aebb18e756b14693298944c380a" name="ga5f7c0aebb18e756b14693298944c380a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_clk</b> [3]</td></tr>
<tr class="memdesc:ga5f7c0aebb18e756b14693298944c380a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_clk signal. <br /></td></tr>
<tr class="separator:ga5f7c0aebb18e756b14693298944c380a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaca636699fca2e4bb3e974fdec8518ebd"><td class="memItemLeft" align="right" valign="top"><a id="gaca636699fca2e4bb3e974fdec8518ebd" name="gaca636699fca2e4bb3e974fdec8518ebd"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_miso</b> [4]</td></tr>
<tr class="memdesc:gaca636699fca2e4bb3e974fdec8518ebd"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_miso signal. <br /></td></tr>
<tr class="separator:gaca636699fca2e4bb3e974fdec8518ebd"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga47a98769e939c6a90f343ebe3ab60602"><td class="memItemLeft" align="right" valign="top"><a id="ga47a98769e939c6a90f343ebe3ab60602" name="ga47a98769e939c6a90f343ebe3ab60602"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_mosi</b> [4]</td></tr>
<tr class="memdesc:ga47a98769e939c6a90f343ebe3ab60602"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_mosi signal. <br /></td></tr>
<tr class="separator:ga47a98769e939c6a90f343ebe3ab60602"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4f9cb643781d46cf384664aa6f3a59dc"><td class="memItemLeft" align="right" valign="top"><a id="ga4f9cb643781d46cf384664aa6f3a59dc" name="ga4f9cb643781d46cf384664aa6f3a59dc"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select0</b> [4]</td></tr>
<tr class="memdesc:ga4f9cb643781d46cf384664aa6f3a59dc"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select0 signal. <br /></td></tr>
<tr class="separator:ga4f9cb643781d46cf384664aa6f3a59dc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga46193372d3be300ac0a0407a3d7b0b23"><td class="memItemLeft" align="right" valign="top"><a id="ga46193372d3be300ac0a0407a3d7b0b23" name="ga46193372d3be300ac0a0407a3d7b0b23"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select1</b> [3]</td></tr>
<tr class="memdesc:ga46193372d3be300ac0a0407a3d7b0b23"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select1 signal. <br /></td></tr>
<tr class="separator:ga46193372d3be300ac0a0407a3d7b0b23"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga865ef5bf0a4cde8feba33fd3b2955653"><td class="memItemLeft" align="right" valign="top"><a id="ga865ef5bf0a4cde8feba33fd3b2955653" name="ga865ef5bf0a4cde8feba33fd3b2955653"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select2</b> [3]</td></tr>
<tr class="memdesc:ga865ef5bf0a4cde8feba33fd3b2955653"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select2 signal. <br /></td></tr>
<tr class="separator:ga865ef5bf0a4cde8feba33fd3b2955653"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="memItemLeft" align="right" valign="top"><a id="gab9c8f3a6d996db1aaf26a5229a1d463c" name="gab9c8f3a6d996db1aaf26a5229a1d463c"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_spi_s_select3</b> [2]</td></tr>
<tr class="memdesc:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_spi_s_select3 signal. <br /></td></tr>
<tr class="separator:gab9c8f3a6d996db1aaf26a5229a1d463c"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga371f3ca11b39729c0a1a0ad5db286209"><td class="memItemLeft" align="right" valign="top"><a id="ga371f3ca11b39729c0a1a0ad5db286209" name="ga371f3ca11b39729c0a1a0ad5db286209"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_cts</b> [4]</td></tr>
<tr class="memdesc:ga371f3ca11b39729c0a1a0ad5db286209"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_cts signal. <br /></td></tr>
<tr class="separator:ga371f3ca11b39729c0a1a0ad5db286209"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga785e708408866399187acf6512861053"><td class="memItemLeft" align="right" valign="top"><a id="ga785e708408866399187acf6512861053" name="ga785e708408866399187acf6512861053"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_rts</b> [2]</td></tr>
<tr class="memdesc:ga785e708408866399187acf6512861053"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_rts signal. <br /></td></tr>
<tr class="separator:ga785e708408866399187acf6512861053"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga8f1464e6b69bdbcc14991bb888c4b066"><td class="memItemLeft" align="right" valign="top"><a id="ga8f1464e6b69bdbcc14991bb888c4b066" name="ga8f1464e6b69bdbcc14991bb888c4b066"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_rx</b> [2]</td></tr>
<tr class="memdesc:ga8f1464e6b69bdbcc14991bb888c4b066"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_rx signal. <br /></td></tr>
<tr class="separator:ga8f1464e6b69bdbcc14991bb888c4b066"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gabe4cb0b7843c8bae913906c185549f1a"><td class="memItemLeft" align="right" valign="top"><a id="gabe4cb0b7843c8bae913906c185549f1a" name="gabe4cb0b7843c8bae913906c185549f1a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_scb_uart_tx</b> [2]</td></tr>
<tr class="memdesc:gabe4cb0b7843c8bae913906c185549f1a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the scb_uart_tx signal. <br /></td></tr>
<tr class="separator:gabe4cb0b7843c8bae913906c185549f1a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2a6c03c305ec93e487644037cd689074"><td class="memItemLeft" align="right" valign="top"><a id="ga2a6c03c305ec93e487644037cd689074" name="ga2a6c03c305ec93e487644037cd689074"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_clk</b> [1]</td></tr>
<tr class="memdesc:ga2a6c03c305ec93e487644037cd689074"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_clk signal. <br /></td></tr>
<tr class="separator:ga2a6c03c305ec93e487644037cd689074"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga378664a41ec7e92635dabd81dff171b1"><td class="memItemLeft" align="right" valign="top"><a id="ga378664a41ec7e92635dabd81dff171b1" name="ga378664a41ec7e92635dabd81dff171b1"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_data0</b> [1]</td></tr>
<tr class="memdesc:ga378664a41ec7e92635dabd81dff171b1"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_data0 signal. <br /></td></tr>
<tr class="separator:ga378664a41ec7e92635dabd81dff171b1"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf6ddf64426e34b5b0cf4a7bb06605b46"><td class="memItemLeft" align="right" valign="top"><a id="gaf6ddf64426e34b5b0cf4a7bb06605b46" name="gaf6ddf64426e34b5b0cf4a7bb06605b46"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_data1</b> [1]</td></tr>
<tr class="memdesc:gaf6ddf64426e34b5b0cf4a7bb06605b46"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_data1 signal. <br /></td></tr>
<tr class="separator:gaf6ddf64426e34b5b0cf4a7bb06605b46"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga7d40983581a0d307b3a4d24982084800"><td class="memItemLeft" align="right" valign="top"><a id="ga7d40983581a0d307b3a4d24982084800" name="ga7d40983581a0d307b3a4d24982084800"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_data2</b> [1]</td></tr>
<tr class="memdesc:ga7d40983581a0d307b3a4d24982084800"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_data2 signal. <br /></td></tr>
<tr class="separator:ga7d40983581a0d307b3a4d24982084800"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gae0ba4b8191d0ce260e08fca914553439"><td class="memItemLeft" align="right" valign="top"><a id="gae0ba4b8191d0ce260e08fca914553439" name="gae0ba4b8191d0ce260e08fca914553439"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_data3</b> [1]</td></tr>
<tr class="memdesc:gae0ba4b8191d0ce260e08fca914553439"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_data3 signal. <br /></td></tr>
<tr class="separator:gae0ba4b8191d0ce260e08fca914553439"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaad5e15237798fe8d3275f878426933b7"><td class="memItemLeft" align="right" valign="top"><a id="gaad5e15237798fe8d3275f878426933b7" name="gaad5e15237798fe8d3275f878426933b7"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_select0</b> [1]</td></tr>
<tr class="memdesc:gaad5e15237798fe8d3275f878426933b7"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_select0 signal. <br /></td></tr>
<tr class="separator:gaad5e15237798fe8d3275f878426933b7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad92a5fd297f6dedf51184d38a52e7e40"><td class="memItemLeft" align="right" valign="top"><a id="gad92a5fd297f6dedf51184d38a52e7e40" name="gad92a5fd297f6dedf51184d38a52e7e40"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_smif_spi_select1</b> [1]</td></tr>
<tr class="memdesc:gad92a5fd297f6dedf51184d38a52e7e40"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the smif_spi_select1 signal. <br /></td></tr>
<tr class="separator:gad92a5fd297f6dedf51184d38a52e7e40"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4aa9c8ac7cd96832923c3ea70cb6285a"><td class="memItemLeft" align="right" valign="top"><a id="ga4aa9c8ac7cd96832923c3ea70cb6285a" name="ga4aa9c8ac7cd96832923c3ea70cb6285a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tcpwm_line</b> [26]</td></tr>
<tr class="memdesc:ga4aa9c8ac7cd96832923c3ea70cb6285a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tcpwm_line signal. <br /></td></tr>
<tr class="separator:ga4aa9c8ac7cd96832923c3ea70cb6285a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga6cd372bdb6fe7f6aaed4600ca26c0797"><td class="memItemLeft" align="right" valign="top"><a id="ga6cd372bdb6fe7f6aaed4600ca26c0797" name="ga6cd372bdb6fe7f6aaed4600ca26c0797"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tcpwm_line_compl</b> [26]</td></tr>
<tr class="memdesc:ga6cd372bdb6fe7f6aaed4600ca26c0797"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tcpwm_line_compl signal. <br /></td></tr>
<tr class="separator:ga6cd372bdb6fe7f6aaed4600ca26c0797"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gac76b2606ebc3eeeccad3be2cc5196ffc"><td class="memItemLeft" align="right" valign="top"><a id="gac76b2606ebc3eeeccad3be2cc5196ffc" name="gac76b2606ebc3eeeccad3be2cc5196ffc"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_rx_fsync</b> [1]</td></tr>
<tr class="memdesc:gac76b2606ebc3eeeccad3be2cc5196ffc"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_rx_fsync signal. <br /></td></tr>
<tr class="separator:gac76b2606ebc3eeeccad3be2cc5196ffc"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gad47fa610c7cc5e90db575d6ae9cc6a8b"><td class="memItemLeft" align="right" valign="top"><a id="gad47fa610c7cc5e90db575d6ae9cc6a8b" name="gad47fa610c7cc5e90db575d6ae9cc6a8b"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_rx_mck</b> [1]</td></tr>
<tr class="memdesc:gad47fa610c7cc5e90db575d6ae9cc6a8b"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_rx_mck signal. <br /></td></tr>
<tr class="separator:gad47fa610c7cc5e90db575d6ae9cc6a8b"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga63c1a69194462794ed2efe4214d9b163"><td class="memItemLeft" align="right" valign="top"><a id="ga63c1a69194462794ed2efe4214d9b163" name="ga63c1a69194462794ed2efe4214d9b163"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_rx_sck</b> [1]</td></tr>
<tr class="memdesc:ga63c1a69194462794ed2efe4214d9b163"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_rx_sck signal. <br /></td></tr>
<tr class="separator:ga63c1a69194462794ed2efe4214d9b163"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gab34adb7a285d91aa232e2e8b755b40d7"><td class="memItemLeft" align="right" valign="top"><a id="gab34adb7a285d91aa232e2e8b755b40d7" name="gab34adb7a285d91aa232e2e8b755b40d7"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_rx_sd</b> [1]</td></tr>
<tr class="memdesc:gab34adb7a285d91aa232e2e8b755b40d7"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_rx_sd signal. <br /></td></tr>
<tr class="separator:gab34adb7a285d91aa232e2e8b755b40d7"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga2caf84e3e82eb2dfc6cdd108a14da931"><td class="memItemLeft" align="right" valign="top"><a id="ga2caf84e3e82eb2dfc6cdd108a14da931" name="ga2caf84e3e82eb2dfc6cdd108a14da931"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_tx_fsync</b> [1]</td></tr>
<tr class="memdesc:ga2caf84e3e82eb2dfc6cdd108a14da931"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_tx_fsync signal. <br /></td></tr>
<tr class="separator:ga2caf84e3e82eb2dfc6cdd108a14da931"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga98992ed41fdd98a9a71e3f68a4b5003a"><td class="memItemLeft" align="right" valign="top"><a id="ga98992ed41fdd98a9a71e3f68a4b5003a" name="ga98992ed41fdd98a9a71e3f68a4b5003a"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_tx_mck</b> [1]</td></tr>
<tr class="memdesc:ga98992ed41fdd98a9a71e3f68a4b5003a"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_tx_mck signal. <br /></td></tr>
<tr class="separator:ga98992ed41fdd98a9a71e3f68a4b5003a"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:gaf308a287ce2170ebab6a5f9101b48b15"><td class="memItemLeft" align="right" valign="top"><a id="gaf308a287ce2170ebab6a5f9101b48b15" name="gaf308a287ce2170ebab6a5f9101b48b15"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_tx_sck</b> [1]</td></tr>
<tr class="memdesc:gaf308a287ce2170ebab6a5f9101b48b15"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_tx_sck signal. <br /></td></tr>
<tr class="separator:gaf308a287ce2170ebab6a5f9101b48b15"><td class="memSeparator" colspan="2">&#160;</td></tr>
<tr class="memitem:ga4099de673ed37579e9b3c0145f26bad2"><td class="memItemLeft" align="right" valign="top"><a id="ga4099de673ed37579e9b3c0145f26bad2" name="ga4099de673ed37579e9b3c0145f26bad2"></a>
const <a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#structcyhal__resource__pin__mapping__t">cyhal_resource_pin_mapping_t</a>&#160;</td><td class="memItemRight" valign="bottom"><b>cyhal_pin_map_tdm_tdm_tx_sd</b> [1]</td></tr>
<tr class="memdesc:ga4099de673ed37579e9b3c0145f26bad2"><td class="mdescLeft">&#160;</td><td class="mdescRight">List of valid pin to peripheral connections for the tdm_tdm_tx_sd signal. <br /></td></tr>
<tr class="separator:ga4099de673ed37579e9b3c0145f26bad2"><td class="memSeparator" colspan="2">&#160;</td></tr>
</table>
<hr/><h2 class="groupheader">Data Structure Documentation</h2>
<a name="structcyhal__resource__pin__mapping__t" id="structcyhal__resource__pin__mapping__t"></a>
<h2 class="memtitle"><span class="permalink"><a href="#structcyhal__resource__pin__mapping__t">&#9670;&nbsp;</a></span>cyhal_resource_pin_mapping_t</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">struct cyhal_resource_pin_mapping_t</td>
        </tr>
      </table>
</div><div class="memdoc">
<table class="fieldtable">
<tr><th colspan="3">Data Fields</th></tr>
<tr><td class="fieldtype">
<a id="a4fa13cb0d2ae96aeeb50c0c0c63e3b91" name="a4fa13cb0d2ae96aeeb50c0c0c63e3b91"></a>uint8_t</td>
<td class="fieldname">
block_num</td>
<td class="fielddoc">
The block number of the resource with this connection. </td></tr>
<tr><td class="fieldtype">
<a id="a023ce9599d5a2fe07f82dd3cf5a7570b" name="a023ce9599d5a2fe07f82dd3cf5a7570b"></a>uint8_t</td>
<td class="fieldname">
channel_num</td>
<td class="fielddoc">
The channel number of the block with this connection. </td></tr>
<tr><td class="fieldtype">
<a id="a61f6033fdaae54a06ac8e63656b2a37a" name="a61f6033fdaae54a06ac8e63656b2a37a"></a><a class="el" href="group__group__hal__impl__pin__package__psoc6__01__104__m__csp__ble.html#ga707195ce0627016bf371643bdd9caa51">cyhal_gpio_t</a></td>
<td class="fieldname">
pin</td>
<td class="fielddoc">
The GPIO pin the connection is with. </td></tr>
<tr><td class="fieldtype">
<a id="ad4514be01ab83c7248c320b3232145c1" name="ad4514be01ab83c7248c320b3232145c1"></a>en_hsiom_sel_t</td>
<td class="fieldname">
hsiom</td>
<td class="fielddoc">
The HSIOM configuration value. </td></tr>
</table>

</div>
</div>
<h2 class="groupheader">Enumeration Type Documentation</h2>
<a id="gab24d2d0f36afa1c85516af9e53405e70" name="gab24d2d0f36afa1c85516af9e53405e70"></a>
<h2 class="memtitle"><span class="permalink"><a href="#gab24d2d0f36afa1c85516af9e53405e70">&#9670;&nbsp;</a></span>cyhal_gpio_cyw20829_56_qfn_t</h2>

<div class="memitem">
<div class="memproto">
      <table class="memname">
        <tr>
          <td class="memname">enum <a class="el" href="group__group__hal__impl__pin__package__cyw20829__56__qfn.html#gab24d2d0f36afa1c85516af9e53405e70">cyhal_gpio_cyw20829_56_qfn_t</a></td>
        </tr>
      </table>
</div><div class="memdoc">

<p>Definitions for all of the pins that are bonded out on in the 56-QFN package for the CYW20829 series. </p>
<table class="fieldtable">
<tr><th colspan="2">Enumerator</th></tr><tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a3dbd1016ea99d087d747530418b89a01" name="ggab24d2d0f36afa1c85516af9e53405e70a3dbd1016ea99d087d747530418b89a01"></a>NC&#160;</td><td class="fielddoc"><p >No Connect/Invalid Pin. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a23d505c049c81443b12e53d5b00b1be9" name="ggab24d2d0f36afa1c85516af9e53405e70a23d505c049c81443b12e53d5b00b1be9"></a>P0_0&#160;</td><td class="fielddoc"><p >Port 0 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a8c239764fe5c947cad341b176d49eb73" name="ggab24d2d0f36afa1c85516af9e53405e70a8c239764fe5c947cad341b176d49eb73"></a>P0_1&#160;</td><td class="fielddoc"><p >Port 0 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a950df72443b521531bc3be8f4058fd85" name="ggab24d2d0f36afa1c85516af9e53405e70a950df72443b521531bc3be8f4058fd85"></a>P0_2&#160;</td><td class="fielddoc"><p >Port 0 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a7dd012609401076ec68c99a41fcf12bc" name="ggab24d2d0f36afa1c85516af9e53405e70a7dd012609401076ec68c99a41fcf12bc"></a>P0_3&#160;</td><td class="fielddoc"><p >Port 0 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a8f9331cecf3c8f1bf81bc66386c8b4c1" name="ggab24d2d0f36afa1c85516af9e53405e70a8f9331cecf3c8f1bf81bc66386c8b4c1"></a>P0_4&#160;</td><td class="fielddoc"><p >Port 0 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70aad04d2399d62b5af8c88438d56ddf99b" name="ggab24d2d0f36afa1c85516af9e53405e70aad04d2399d62b5af8c88438d56ddf99b"></a>P0_5&#160;</td><td class="fielddoc"><p >Port 0 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70aa25f499b57adc3dae9ca1a877f47f2af" name="ggab24d2d0f36afa1c85516af9e53405e70aa25f499b57adc3dae9ca1a877f47f2af"></a>P1_0&#160;</td><td class="fielddoc"><p >Port 1 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70ab0d32687fab06c4263f65b6741adf308" name="ggab24d2d0f36afa1c85516af9e53405e70ab0d32687fab06c4263f65b6741adf308"></a>P1_1&#160;</td><td class="fielddoc"><p >Port 1 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a12c69ba58f68ac9252a9e84170e354c7" name="ggab24d2d0f36afa1c85516af9e53405e70a12c69ba58f68ac9252a9e84170e354c7"></a>P1_2&#160;</td><td class="fielddoc"><p >Port 1 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70ac964ac363209c16f9e842d139f1821df" name="ggab24d2d0f36afa1c85516af9e53405e70ac964ac363209c16f9e842d139f1821df"></a>P1_3&#160;</td><td class="fielddoc"><p >Port 1 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a2712fb6be5ef97fd9f5a9b42baaf5f05" name="ggab24d2d0f36afa1c85516af9e53405e70a2712fb6be5ef97fd9f5a9b42baaf5f05"></a>P1_4&#160;</td><td class="fielddoc"><p >Port 1 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70adb0a4a23b91349a0f85a26ee16c2299c" name="ggab24d2d0f36afa1c85516af9e53405e70adb0a4a23b91349a0f85a26ee16c2299c"></a>P1_5&#160;</td><td class="fielddoc"><p >Port 1 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a1c09e634fa0f157f766022d25ea2860d" name="ggab24d2d0f36afa1c85516af9e53405e70a1c09e634fa0f157f766022d25ea2860d"></a>P1_6&#160;</td><td class="fielddoc"><p >Port 1 Pin 6. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70aeeaaeb6232b5bd27b3d18c1699737e31" name="ggab24d2d0f36afa1c85516af9e53405e70aeeaaeb6232b5bd27b3d18c1699737e31"></a>P2_0&#160;</td><td class="fielddoc"><p >Port 2 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a33daef487e90b1d8ee897624249d060e" name="ggab24d2d0f36afa1c85516af9e53405e70a33daef487e90b1d8ee897624249d060e"></a>P2_1&#160;</td><td class="fielddoc"><p >Port 2 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a10b4a9ccdcdec6c07ceedf09708bed1a" name="ggab24d2d0f36afa1c85516af9e53405e70a10b4a9ccdcdec6c07ceedf09708bed1a"></a>P2_2&#160;</td><td class="fielddoc"><p >Port 2 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70ae1949ab941c558f0c66b48e8463bbada" name="ggab24d2d0f36afa1c85516af9e53405e70ae1949ab941c558f0c66b48e8463bbada"></a>P2_3&#160;</td><td class="fielddoc"><p >Port 2 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70aa1814d6db2865c42fb3c7fc7688ab5c5" name="ggab24d2d0f36afa1c85516af9e53405e70aa1814d6db2865c42fb3c7fc7688ab5c5"></a>P2_4&#160;</td><td class="fielddoc"><p >Port 2 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a40df3c1aee5d74c3877d7b8d8bccb69e" name="ggab24d2d0f36afa1c85516af9e53405e70a40df3c1aee5d74c3877d7b8d8bccb69e"></a>P2_5&#160;</td><td class="fielddoc"><p >Port 2 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a2a52d7696dc09e50106e86c3c5d17553" name="ggab24d2d0f36afa1c85516af9e53405e70a2a52d7696dc09e50106e86c3c5d17553"></a>P3_0&#160;</td><td class="fielddoc"><p >Port 3 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70aecc7f0ac8642bc54d5263aa885d41908" name="ggab24d2d0f36afa1c85516af9e53405e70aecc7f0ac8642bc54d5263aa885d41908"></a>P3_1&#160;</td><td class="fielddoc"><p >Port 3 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70acd157ea5f39d394d92881bdfc3289dab" name="ggab24d2d0f36afa1c85516af9e53405e70acd157ea5f39d394d92881bdfc3289dab"></a>P3_2&#160;</td><td class="fielddoc"><p >Port 3 Pin 2. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a54a63837a8bb026bd112b886ca8dc47d" name="ggab24d2d0f36afa1c85516af9e53405e70a54a63837a8bb026bd112b886ca8dc47d"></a>P3_3&#160;</td><td class="fielddoc"><p >Port 3 Pin 3. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a2870e8226d9447a9d9cc1788ae88dbb7" name="ggab24d2d0f36afa1c85516af9e53405e70a2870e8226d9447a9d9cc1788ae88dbb7"></a>P3_4&#160;</td><td class="fielddoc"><p >Port 3 Pin 4. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a2269bac40e13cb61f09fdb588507da82" name="ggab24d2d0f36afa1c85516af9e53405e70a2269bac40e13cb61f09fdb588507da82"></a>P3_5&#160;</td><td class="fielddoc"><p >Port 3 Pin 5. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70afd215d1efb45e70398433193f49c307c" name="ggab24d2d0f36afa1c85516af9e53405e70afd215d1efb45e70398433193f49c307c"></a>P3_6&#160;</td><td class="fielddoc"><p >Port 3 Pin 6. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a526941c3135107781ce25d01b016b23e" name="ggab24d2d0f36afa1c85516af9e53405e70a526941c3135107781ce25d01b016b23e"></a>P3_7&#160;</td><td class="fielddoc"><p >Port 3 Pin 7. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70ab85e0c3af8cd4b57398754081786a201" name="ggab24d2d0f36afa1c85516af9e53405e70ab85e0c3af8cd4b57398754081786a201"></a>P4_0&#160;</td><td class="fielddoc"><p >Port 4 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70abd2abcc9f0b2483ad5a64032a1edf2f4" name="ggab24d2d0f36afa1c85516af9e53405e70abd2abcc9f0b2483ad5a64032a1edf2f4"></a>P4_1&#160;</td><td class="fielddoc"><p >Port 4 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a702f0443ac82eec7db778039597602de" name="ggab24d2d0f36afa1c85516af9e53405e70a702f0443ac82eec7db778039597602de"></a>P5_0&#160;</td><td class="fielddoc"><p >Port 5 Pin 0. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a6e81efad69a0ea034651af008bd857b9" name="ggab24d2d0f36afa1c85516af9e53405e70a6e81efad69a0ea034651af008bd857b9"></a>P5_1&#160;</td><td class="fielddoc"><p >Port 5 Pin 1. </p>
</td></tr>
<tr><td class="fieldname"><a id="ggab24d2d0f36afa1c85516af9e53405e70a48fead26a455d15e627a59f49e735ed6" name="ggab24d2d0f36afa1c85516af9e53405e70a48fead26a455d15e627a59f49e735ed6"></a>P5_2&#160;</td><td class="fielddoc"><p >Port 5 Pin 2. </p>
</td></tr>
</table>

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